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TQ9
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Graphics-class SHB featuring the Dual-Core and Quad-Core Intel® Core™ 2 Processor and the Intel® Q35 Express Chipset |
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MCGT
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Dual processor, graphics-class SHB featuring dual- and quad-core Intel® Xeon® processors and 16GB of system memory |
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MCGI
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Single processor, graphics-class SHB featuring dual- and quad-core Intel® Xeon® processors and 16GB of system memory |
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MCGT-E
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Dual processor, graphics-class SHB featuring dual- and quad-core Intel® Xeon® processors and 32GB of system memory |
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MCGI-E
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Single processor, graphics-class SHB featuring dual- and quad-core Intel® Xeon® processors and 32GB of system memory |
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MCXT
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Dual processor, server-class SHB featuring dual- and quad-core Intel® Xeon® processors and 16GB of system memory |
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MCXI
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Single processor, server-class SHB featuring dual- and quad-core Intel® Xeon® processors and 16GB of system memory |
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MCXT-E
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Dual processor, server-class SHB featuring dual- and quad-core Intel® Xeon® processors and 32GB of system memory |
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MCXI-E
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Single processor, server-class SHB featuring dual- and quad-core Intel® Xeon® processors and 32GB of system memory |
*Contact Trenton if you do not see the backplane slot configuration needed for your application
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Pin 1 on the connectors is indicated by the square pad on the PCB.
All connectors listed are used on the 6830-002 model of the IOB32.
Connectors P6 and P9 are used on the 6830-001 and 6830-002 models of the IOB32 module.
9 position "D" right angle, Spectrum #56-402-001
| PIN |
SIGNAL |
| 1 |
Carrier Detect |
| 2 |
Receive Data-I |
| 3 |
Transmit Data-0 |
| 4 |
Data Terminal Ready-0 |
| 5 |
Signal Gnd |
|
| PIN |
SIGNAL |
| 6 |
Data Set Ready-I |
| 7 |
Request to Send-O |
| 8 |
Clear to Send-I |
| 9 |
Ring Indicator-I |
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9 position "D" right angle, Spectrum #56-402-001
| PIN |
SIGNAL |
| 1 |
Carrier Detect |
| 2 |
Receive Data-I |
| 3 |
Transmit Data-0 |
| 4 |
Data Terminal Ready-0 |
| 5 |
Signal Gnd |
|
| PIN |
SIGNAL |
| 6 |
Data Set Ready-I |
| 7 |
Request to Send-O |
| 8 |
Clear to Send-I |
| 9 |
Ring Indicator-I |
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6 pin mini DIN, Tyco 5750071-1
| PIN |
SIGNAL |
| 1 |
Ms Data |
| 2 |
Kbd Data |
| 3 |
Gnd |
| 4 |
Power (+5v fused) with self-resetting fuse |
| 5 |
MS Clock |
| 6 |
Kbd Clock |
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34 pin dual row header, Molex #702463401
| PIN |
SIGNAL |
| 1 |
Gnd |
| 3 |
Gnd |
| 5 |
Gnd |
| 7 |
Gnd |
| 9 |
Gnd |
| 11 |
Gnd |
| 13 |
Gnd |
| 15 |
Gnd |
| 17 |
Gnd |
| 19 |
Gnd |
| 21 |
Gnd |
| 23 |
Gnd |
| 25 |
Gnd |
| 27 |
Gnd |
| 29 |
Gnd |
| 31 |
Gnd |
| 33 |
Gnd |
|
| PIN |
SIGNAL |
| 2 |
N-RPM |
| 4 |
NC |
| 6 |
D-Rate0 |
| 8 |
P-Index |
| 10 |
N-Motoron 1 |
| 12 |
N-Drive Sel2 |
| 14 |
N-Drive Sel1 |
| 16 |
N-Motoron 2 |
| 18 |
N-Dir |
| 20 |
N-Stop Step |
| 22 |
N-Write Data |
| 24 |
N-Write Gate |
| 26 |
P-Track 0 |
| 28 |
P-Write Protect |
| 30 |
N-Read Data |
| 32 |
N-Side Select |
| 34 |
Disk Change |
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26 pin dual row header, Molex #702462601
| PIN |
SIGNAL |
| 1 |
Strobe |
| 3 |
Data Bit 0 |
| 5 |
Data Bit 1 |
| 7 |
Data Bit 2 |
| 9 |
Data Bit 3 |
| 11 |
Data Bit 4 |
| 13 |
Data Bit 5 |
| 15 |
Data Bit 6 |
| 17 |
Data Bit 7 |
| 19 |
ACK |
| 21 |
Busy |
| 23 |
Paper End |
| 25 |
Slct |
|
| PIN |
SIGNAL |
| 2 |
Auto Feed XT |
| 4 |
Error |
| 6 |
Init |
| 8 |
Slct In |
| 10 |
Gnd |
| 12 |
Gnd |
| 14 |
Gnd |
| 16 |
Gnd |
| 18 |
Gnd |
| 20 |
Gnd |
| 22 |
Gnd |
| 24 |
Gnd |
| 26 |
NC |
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The Trusted Platform Module or TPM is a component from the Atmel Corporation that is mounted on the bottom of a Trenton IOB32 board. The data protection and system access schemes of the past housed data encryption and security key operations in a computer's storage device or system memory. The results being that no matter how good the protection scheme was, the system was still vulnerable to attack. A TPM increases a systems' data security while providing a highly controlled level of access by placing key system operations and tasks within the protected environment of the TPM itself.
An IOB32 plugged into a Trenton PICMG 1.3 System Host Board (SHB) provides the TPM functionality that enables an industrial computer to meet the various Trusted Computing specifications and standards that have been defined by the Trusted Computing Group™. TPM is designed to provide computer platform security by using sophisticated data encryption techniques and platform user authentication.
The operating system software, NTRU CTSS (Core TCG Software Stack), TPM driver, TPM application software and the SHB's BIOS all work together to provide the software support needed to implement TPM. The BIOS is part of the SHB and the TPM driver from Trenton includes the CTSS. The CTSS is used by 3rd party TPM application software such as the EMBASSY® Trusted Suite (ETS) from Wave Systems Corp. to unlock the full feature set of the IOB32's TPM.
The TPM and the associated software mentioned in the previous paragraph provide two different types of locks that protect the computer's data and platform access. Two different keys are needed for the TPM locks: migratable keys and non-migratable keys. The use of keys and platform specific authentication information within the TPM help protect a system from a wide variety of software-based attacks.
Visit the Trusted Computing Group's website (www.TrustedComputing.org) to learn more about what TPM is and how it enables a system to operate as a “Trusted Computing” solution platform.
The IOB32's TPM is defaulted to “OFF” and the SHB's Trusted Computing BIOS settings are defaulted to “NO” for TCG/TPM Support and “Disable” for Execute TPM Card. Refer to the IOB32 Reference Guide for instructions on how to install the IOB32 and set up the system's TPM software elements for Trusted Computing operation.
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76 pin controlled impedance connector,
Samtec #MIT-038-05-FD
| PIN |
SIGNAL |
| 1 |
+12V |
| 3 |
NC |
| 5 |
NC |
| 7 |
NC |
| 9 |
NC |
| 11 |
NC |
| 13 |
ICH_SMI# |
| 15 |
ICH_SIOPME# |
| 17 |
Gnd |
| 19 |
L_FRAME# |
| 21 |
L_DRQ1# |
| 23 |
L_DRQ0# |
| 25 |
SERIRQ |
| 27 |
Gnd |
| 29 |
PCLK14SIO |
| 31 |
Gnd |
| 33 |
SMBDATA_RESUME |
| 35 |
SMBCLK_RESUME |
| 37 |
SALRT#_RESUME |
| 39 |
Gnd |
| 41 |
EXP_CLK100 |
| 43 |
EXP_CLK100# |
| 45 |
Gnd |
| 47 |
C_PE_TXP4 |
| 49 |
C_PE_TXN4 |
| 51 |
Gnd |
| 53 |
C_PE_TXP3 |
| 55 |
C_PE_TXN3 |
| 57 |
Gnd |
| 59 |
C_PE_TXP2 |
| 61 |
C_PE_TXN2 |
| 63 |
Gnd |
| 65 |
C_PE_TXP1 |
| 67 |
C_PE_TXN1 |
| 69 |
Gnd |
| 71 |
+3.3V |
| 73 |
+3.3V |
| 75 |
+3.3V |
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| PIN |
SIGNAL |
| 2 |
+5V_STANDBY |
| 4 |
+5V_STANDBY |
| 6 |
+5V_DUAL |
| 8 |
+5V_DUAL |
| 10 |
NC |
| 12 |
NC |
| 14 |
ICH_RCIN# |
| 16 |
ICH_A20GATE |
| 18 |
Gnd |
| 20 |
L_AD3 |
| 22 |
L_AD2 |
| 24 |
L_AD1 |
| 26 |
L_AD0 |
| 28 |
Gnd |
| 30 |
PCLK33LPC |
| 32 |
Gnd |
| 34 |
IPMB_DAT |
| 36 |
IPMB_CLK |
| 38 |
IPMB_ALRT# |
| 40 |
Gnd |
| 42 |
EXP_RESET# |
| 44 |
ICH_WAKE# |
| 46 |
Gnd |
| 48 |
C_PE_RXP4 |
| 50 |
C_PE_RXN4 |
| 52 |
Gnd |
| 54 |
C_PE_RXP3 |
| 56 |
C_PE_RXN3 |
| 58 |
Gnd |
| 60 |
C_PE_RXP2 |
| 62 |
C_PE_RXN2 |
| 64 |
Gnd |
| 66 |
C_PE_RXP1 |
| 68 |
C_PE_RXN1 |
| 70 |
Gnd |
| 72 |
+5V |
| 74 |
+5V |
| 76 |
+5V |
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5 pin single row header, Amp #640456-5
| PIN |
SIGNAL |
| 1 |
Kbd Clock |
| 2 |
Kbd Data |
| 3 |
Key |
| 4 |
Kbd Gnd |
| 5 |
Kbd Power (+5V fused) with
self-resetting fuse |
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6 pin single row header, Amp #640456-6
| PIN |
SIGNAL |
| 1 |
Ms Data |
| 2 |
Reserved |
| 3 |
Gnd |
| 4 |
Power (+5V fused) with
self-resetting fuse |
| 5 |
Ms Clock |
| 6 |
Reserved |
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2 pin single row header, Amp #640456-2
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
Contact closure to/from the TPM Module |
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- Trenton MCX-series, or MCG-series or TQ9 System Host Board (SHB)
- Microsoft Windows XP Professional (SP2) 32-bit or Microsoft
- Windows Vista Ultimate 32-bit operating system
- Trenton/Atmel TPM Driver (includes NTRU CTSS - Core TCG Software Stack)
- Microsoft Internet Explorer 5.5 or later
- Adobe Acrobat 5.0 or later
- EMBASSY Trust Suite - TPM Application Software
- Trenton MCX-series, or MCG-series or TQ9 System Host Board (SHB)
- Windows Vista Ultimate 32-bit or 64-bit operating system
- Bit Locker functionality used for basic TPM implementations
- Trenton/Atmel TPM Driver (includes NTRU CTSS - Core TCG Software Stack)
- Microsoft Internet Explorer 5.5 or later
- Adobe Acrobat 5.0 or later
IBM, PC/AT, VGA, EGA, OS/2 and PS/2 are trademarks or registered trademarks of International Business Machines Corp.
AMI and AMIBIOS are trademarks of American Megatrends Inc.
Windows XP, Windows Vista Ultimate and Microsoft are trademarks or registered trademarks of Microsoft Corp.
Atmel is a registered trademark of Atmel Corp.
EMBASSY Trust Suite and Wave are registered trademarks of Wave Systems Corp.
PICMG, SHB Express and the PICMG logo are trademarks or registered trademarks of the PCI Industrial Computer Manufacturers Group.
All other brand and product names may be trademarks or registered trademarks of their respective companies. |