TSB7053 | PICMG 1.3 System Host Board (SHB) | Intel Xeon E3-1200 Series Processor

PICMG® 1.3 Form Factor - Automatically adapts to graphics or server-class backplane PCIe link configurations - one x16 and one x4/four x1 or two x8 and one x4/four x1 PCIe links

Intel® Xeon® E3-1275 Processor - Quad core, 3.4GHz with Hyper-Threading, 8MB cache
Intel® Xeon® E3-1225 Processor - Quad core, 3.1GHz without Hyper-Threading, 6MB cache

Intel® Core™ i7-2600  Processor - Quad core, 3.4GHz with Hyper-Threading, 8MB cache
Intel® Core™ i5-2400  Processor - Quad core, 3.1GHz without Hyper-Threading, 6MB cache
Intel® Core™ i3-2120  Processor - Dual core, 3.3GHz with Hyper-Threading, 3MB cache

These long-life, advanced server, Sandy Bridge processors feature a 2.5GT/s DMI interface to the board's C206 PCH, an 800MHz integrated graphics frequency and support Intel® AMT 7.0 system applications.

Consult Trenton for additional processor options.

AMI - Aptio® 4.x

Intel® C206 Platform Controller Hub (PCH) (Cougar Point)

32GB maximum when using standard 8GB DDR3 DIMMs. The board's two, dual-channel DDR3-1333 memory interfaces have four DIMM sockets that support unbuffered ECC, PC3-8500 or PC3-10600 DDR3 memory DIMMs.

Standard PICMG 1.3 PCI Express Interfaces - Automatically adapts to graphics or server-class backplane PCIe link configurations - one x16 and one x4 or two x8 and one x4 PCIe links.  The direct PCIe links from the board's processor (links A0, A1 and A2 ) may operate as either PCIe Gen 1.1 or PCIe Gen 2.0 depending on the backplane design.  The x4 link from the board's C206 PCH (link B0) also supports PCIe 1.1 and 2.0 interfaces and can operate as either one x4 link or bifurcate into four, x1 PCIe links automatically.  An optional x4 PCIe 1.1/2.0 link is also available for use with a Trenton IOB33 expansion module to a PICMG 1.3 backplane equipped with a PCIe Expansion Slot.

Analog Video Port - Located on the board's I/O bracket and supports standard 15-pin VGA video cables.

Digital Video Port - Located on the TSB7053 itself, this DVI-D port supports standard digital video cable connections.

Multiple video connections are an inherent system design advantage of Trenton's TSB7053 featuring the Intel® Xeon® E3-1275 processor and the Intel® C206 chipset.  The Intel® HD Graphics P3000 technology is featured in the graphics controller engine of the Intel® Xeon® E3-1200 series processors, while the Intel® C206 PCH supports a direct 800MHz integrated graphics frequency that when combined with the processor delivers an outstanding visual computing performance.

The integrated graphics controller of the board’s processor dynamically utilizes a portion of the system memory based on the OS and the amount of memory installed.  Intel® HD Graphics P3000 is featured in the Intel® Xeon® E3-1200 series processors while Intel® HD Graphics 2000 is part of the TSB7053's long-life Intel Core i7-2600, Intel Core i5-2400 and Intel Core i3-2120 processor options.  All processors support maximum video resolutions of 2560 x 1600.  The Intel® Xeon® E3-1200 series feature twelve (12) video execution units making these processor options ideal for advanced 3D video applications.  The long-life Intel Core i7/i5/i3 processor options have six (6) video execution units.

Intel® 82580DB Ethernet Controller - Two 10/100/1000Base-T on I/O Bracket Connectors
Intel® 82579 Ethernet PHY - One 10/100/1000Base-T interface routed to SHB edge connector C*

*Use this backplane LAN interface in system applications that take advantage of the TSB7053's Intel® AMT 7.0 network management, out-of-band client system security, KVM remote system access and control plus many other network management capabilities supported by Intel® vPro and specifically Intel® AMT 7.0.  This LAN interface may be accessed either by connector P18 on the TSB7053 or via the LAN interface connection on a PICMG® 1.3 backplane. 

Ten USB 2.0 ports - Two on the I/O bracket, four located on two dual-interface onboard headers plus four routed to SHB edge connector "C"

All six SATA ports on the TSB7053 support 300MB/s data transfers.  In addition, SATA ports 1 and 2 are available for use in applications that require 600MB/s transfers.  In other words all ports support SATA Gen 2.0 devices while ports 1 and 2 support both SATA Gen 3.0 and SATA Gen 2.0 devices.  The ports may be used for either independent SATA drive operation or in RAID 0,1,5 and 10 drive array system configurations.

Serial Port 1 header - RS422/RS485
RS485 interface configuration jumpers enable the following RS485 interface options:
 1. full duplex without terminations
 2. half duplex without terminations 
 3. full duplex with terminations

Serial Port 2 header - RS232

PS/2 Mouse header

PS/2 Keyboard header

PCI Express Mini Connector located on the rear of the board support industry standard PCIe Mini Cards

Optional IOB33 provides an additional x4 PCIe link to a backplane plus the following I/O expansion capabilities:
 - IOB33 I/O plate connectors - Two DB9 RS232 serial ports and one PS/2 MiniDin for
                                                  PS/2 mouse & keyboard*
 - IOB33 I/O header connectors - Floppy drive, parallel port, PS/2 keyboard and PS/2 mouse*

*The one Super IO component on the TSB7053 supports the SHB’s PS/2 mouse and keyboard ports as well as Serial Port 1 and Serial Port 2.  A future TSB7053 BIOS revision may be available to support a second Super I/O chip located on an optional IOB33 module.  This future BIOS revision will enable an IOB33 to plug into the SHBs’ P20 I/O Expansion connector and provide additional IDE floppy and parallel port connectivity to the system designer as well as two additional serial interface ports.  The Super IO Configuration submenu that will be displayed will depend on the SHB’s BIOS revision and if an IOB33 is connected to P20.  This Advanced Setup BIOS sub-menu allows you to configure the system ports connected to the board’s Super I/O component(s).  Contact Trenton or see the Super I/O Configuration section of the BIOS Setup Manual for TSB7053 System Host Board for more details.

The TSB7053 provides a programmable watchdog timer with programmable timeout periods of 100 msec, 1 second, 10 seconds or 1 minute via board component U11.  When enabled the WDT (i.e. U11) will generate a system reset.  WDT control is supplied via the General Purpose IO pins from the Intel® C206 Platform Controller Hub (PCH).  The PCH’s GPIO_LVL2 register controls the state of each GPIO signal.  This 32-bit register is located within GPIO IO spaces.  The GPIO_BASE IO address is determined by the values programmed into the PCH’s LPC Bridge PCI configuration at offset 48-4B(h).

See the watchdog timer section in the specifications chapter of the TSB7053 Hardware Manual for more detailed information and a WDT programming example.

Lithium - CMOS data retention

Board dimensions – 13.330” (33.86cm) L x 4.976” (12.64”cm) H 
Standard cooling solution height – 2.15” (54.61mm) 

Designed for UL69050, CAN/CSA C22.2 No.60950-00, EN55022:1998 Class B, EN61000-4-2:1995, EN61000-4-3:1997, EN61000-4-4:1995, EN61000-4-5:1995, EN61000-4-6:1996, EN61000-4-11:1994

Typical Values - 100% Stressed with 16GB of system memory

Typical Values - Static Desktop (System Idle) with 16GB of system memory

Operating Temperature:  0-50° C with standard cooling solution and 350LFM of continuous airflow