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The setup of the configuration jumpers on the
SBC is described below. * indicates the default value of each jumper.
For two-position jumpers (3-post), "TOP" is toward
the memory sockets; "BOTTOM" is toward the edge fingers.
* = default value
If the processor core gets to a critical temperature,
it slows itself down to half its normal speed. This jumper sets
the way in which the LED displays in response to this self-limiting
mode.
Install for real-time activity. The LED lights
only when the processor is operating in slow-power mode.*
Remove for latched activity. The LED lights
and stays on once the processor has gone into slow-power mode.
This jumper is used in conjunction with the Link/Speed
LED for the 10/100/1000Base-T Ethernet interface. The LED is located
on the SBC's Gigabit LAN connector (LAN2/P1). For further information,
see the Ethernet LEDs and Connectors section below.
Install to use the Link/Speed LED to indicate
that the Ethernet interface has a valid link at either 1000-Mb/s
or 100-Mb/s.
Green = valid link at 1000-Mb/s *
Orange = valid link at 100-Mb/s
Remove to use the Link/Speed LED to indicate
that the Ethernet interface has a valid link at either 100-Mb/s
or 10-Mb/s .
Orange = valid link at 100-Mb/s
Green = valid link at 10-Mb/s
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Install for one power-up cycle to reset the password
to the default (null password).
Remove for normal operation. *
This jumper may be used to enable or disable
on-board active termination for the Ultra160 SCSI interface.
Install on the TOP to enable active temination. *
Install on the BOTTOM to allow the AIC-7892 to control termination.
Remove to disable active termination.
The Flash ROM has two programmable sections: the
Boot Block for "flashing" in the BIOS and the Main Block for the executable
BIOS and PnP parameters. Normally only the Main Block is updated when
a new BIOS is flashed into the system.
|
JU10 |
JU11 |
| All Blocks Write Enabled |
Remove * |
Remove * |
| Boot Block Write Protected |
Install |
Remove |
| Block 2-16 Write Protected |
Remove |
Install |
Install on the TOP to operate. *
Install on the BOTTOM to clear.
NOTE: The CMOS Clear jumper works on power-up. To clear the CMOS,
power down the system, install the jumper, then turn the power back
on. CMOS is cleared during the POST routines. Wait for AMIBIOS to
display a "CMOS Settings Wrong" message; then power down the system
again and remove the jumper before the next power-up.
Install to light the hard drive LED for SCSI
drive activity. *
Remove if you do not have a SCSI drive (i.e., the SCSI controller
is not being used).
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Pin 1 on the connectors is indicated by the square
pad
on the PCB.
8 pin shielded RJ-45 connector, Belfuse #0826-1X1T-23
| PIN |
SIGNAL |
| 1 |
TRP1+ |
| 2 |
TRP1- |
| 3 |
TRP2+ |
| 4 |
TRP3+ |
| 5 |
TRP3- |
| 6 |
TRP2- |
| 7 |
TRP4+ |
| 8 |
TRP4- |
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34 pin dual row header, Amp #103308-7
| PIN |
SIGNAL |
| 1 |
Gnd |
| 3 |
Gnd |
| 5 |
Gnd |
| 7 |
Gnd |
| 9 |
Gnd |
| 11 |
Gnd |
| 13 |
Gnd |
| 15 |
Gnd |
| 17 |
Gnd |
| 19 |
Gnd |
| 21 |
Gnd |
| 23 |
Gnd |
| 25 |
Gnd |
| 27 |
Gnd |
| 29 |
Gnd |
| 31 |
Gnd |
| 33 |
Gnd |
|
| PIN |
SIGNAL |
| 2 |
N-RPM |
| 4 |
NC |
| 6 |
D-Rate0 |
| 8 |
P-Index |
| 10 |
N-Motoron 1 |
| 12 |
N-Drive Sel2 |
| 14 |
N-Drive Sel1 |
| 16 |
N-Motoron 2 |
| 18 |
N-Dir |
| 20 |
N-Stop Step |
| 22 |
N-Write Data |
| 24 |
N-Write Gate |
| 26 |
P-Track 0 |
| 28 |
P-Write Protect |
| 30 |
N-Read Data |
| 32 |
N-Side Select |
| 34 |
Disk Chng |
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5 pin single row header, Amp #640456-5
| PIN |
SIGNAL |
| 1 |
Kbd Clock |
| 2 |
Kbd Data |
| 3 |
Key |
| 4 |
Kbd Gnd |
| 5 |
Kbd Power (+5V fused) with
self-resetting fuse |
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4 pin single row header, Amp #640456-4
| PIN |
SIGNAL |
| 1 |
Speaker Data |
| 2 |
Key |
| 3 |
Gnd |
| 4 |
+5V |
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10 pin dual row header, Amp #103308-1
| PIN |
SIGNAL |
| 1 |
Carrier Detect |
| 3 |
Receive Data-I |
| 5 |
Transmit Data-0 |
| 7 |
Data Terminal Ready-0 |
| 9 |
Signal Gnd |
|
| PIN |
SIGNAL |
| 2 |
Data Set Ready-I |
| 4 |
Request to Send-O |
| 6 |
Clear to Send-I |
| 8 |
Ring Indicator-I |
| 10 |
NC |
|
10 pin dual row header, Amp #103308-1
| PIN |
SIGNAL |
| 1 |
Carrier Detect |
| 3 |
Receive Data-I |
| 5 |
Transmit Data-0 |
| 7 |
Data Terminal Ready-0 |
| 9 |
Signal Gnd |
|
| PIN |
SIGNAL |
| 2 |
Data Set Ready-I |
| 4 |
Request to Send-O |
| 6 |
Clear to Send-I |
| 8 |
Ring Indicator-I |
| 10 |
NC |
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26 pin dual row header, Amp #103308-6
| PIN |
SIGNAL |
| 1 |
Strobe |
| 3 |
Data Bit 0 |
| 5 |
Data Bit 1 |
| 7 |
Data Bit 2 |
| 9 |
Data Bit 3 |
| 11 |
Data Bit 4 |
| 13 |
Data Bit 5 |
| 15 |
Data Bit 6 |
| 17 |
Data Bit 7 |
| 19 |
ACK |
| 21 |
Busy |
| 23 |
Paper End |
| 25 |
Slct |
|
| PIN |
SIGNAL |
| 2 |
Auto Feed XT |
| 4 |
Error |
| 6 |
Init |
| 8 |
Slct In |
| 10 |
Gnd |
| 12 |
Gnd |
| 14 |
Gnd |
| 16 |
Gnd |
| 18 |
Gnd |
| 20 |
Gnd |
| 22 |
Gnd |
| 24 |
Gnd |
| 26 |
NC |
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6 pin mini DIN, Kycon #KMDG-6S-B4T
| PIN |
SIGNAL |
| 1 |
Ms Data |
| 2 |
Kbd Data |
| 3 |
Gnd |
| 4 |
Power (+5V fused) with
self-resetting fuse |
| 5 |
Ms Clock |
| 6 |
Kbd Clock |
|
6 pin single row header, Amp #640456-6
| PIN |
SIGNAL |
| 1 |
Ms Data |
| 2 |
Reserved |
| 3 |
Gnd |
| 4 |
Power (+5V fused) with
self-resetting fuse |
| 5 |
Ms Clock |
| 6 |
Reserved |
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2 pin header, Amp #640456-2
| PIN |
SIGNAL |
| 1 |
External Reset In (Low Active) |
| 2 |
Gnd |
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40 pin dual row header, 3M #30340-6002HB
| PIN |
SIGNAL |
| 1 |
Reset |
| 3 |
Data 7 |
| 5 |
Data 6 |
| 7 |
Data 5 |
| 9 |
Data 4 |
| 11 |
Data 3 |
| 13 |
Data 2 |
| 15 |
Data 1 |
| 17 |
Data 0 |
| 19 |
Gnd |
| 21 |
DRQ 0 |
| 23 |
IOW |
| 25 |
IOR |
| 27 |
IORDY |
| 29 |
DACK 0 |
| 31 |
IRQ 14 |
| 33 |
Add 1 |
| 35 |
Add 0 |
| 37 |
CS 1P |
| 39 |
IDEACTP |
|
| PIN |
SIGNAL |
| 2 |
Gnd |
| 4 |
Data 8 |
| 6 |
Data 9 |
| 8 |
Data 10 |
| 10 |
Data 11 |
| 12 |
Data 12 |
| 14 |
Data 13 |
| 16 |
Data 14 |
| 18 |
Data 15 |
| 20 |
NC |
| 22 |
Gnd |
| 24 |
Gnd |
| 26 |
Gnd |
| 28 |
SELPDP |
| 30 |
Gnd |
| 32 |
NC |
| 34 |
PCBL DET * |
| 36 |
Add 2 |
| 38 |
CS 3P |
| 40 |
Gnd |
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40 pin dual row header, 3M #30340-6002HB
| PIN |
SIGNAL |
| 1 |
Reset |
| 3 |
Data 7 |
| 5 |
Data 6 |
| 7 |
Data 5 |
| 9 |
Data 4 |
| 11 |
Data 3 |
| 13 |
Data 2 |
| 15 |
Data 1 |
| 17 |
Data 0 |
| 19 |
Gnd |
| 21 |
DRQ 1 |
| 23 |
IOW |
| 25 |
IOR |
| 27 |
IORDY |
| 29 |
DACK 1 |
| 31 |
IRQ15 |
| 33 |
Add 1 |
| 35 |
Add 0 |
| 37 |
CS 1S |
| 39 |
IDEACTS |
|
| PIN |
SIGNAL |
| 2 |
Gnd |
| 4 |
Data 8 |
| 6 |
Data 9 |
| 8 |
Data 10 |
| 10 |
Data 11 |
| 12 |
Data 12 |
| 14 |
Data 13 |
| 16 |
Data 14 |
| 18 |
Data 15 |
| 20 |
NC |
| 22 |
Gnd |
| 24 |
Gnd |
| 26 |
Gnd |
| 28 |
SELPDS |
| 30 |
Gnd |
| 32 |
NC |
| 34 |
SCBL DET * |
| 36 |
Add 2 |
| 38 |
CS 3S |
| 40 |
Gnd |
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* For ATA/66 and ATA/100 drives, which should be set for Cable Select
for proper speed operation. If other drives are detected, pin definition
is Gnd.
4 pin single row header, Amp #640456-4
| PIN |
SIGNAL |
| 1 |
LED + |
| 2 |
LED - |
| 3 |
LED - |
| 4 |
LED + |
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68 pin high density connector, Amp #749069-7
| PIN |
SIGNAL |
| 1 |
SCD12 |
| 2 |
SCD13 |
| 3 |
SCD14 |
| 4 |
SCD15 |
| 5 |
SCDPH |
| 6 |
SCD0 |
| 7 |
SCD1 |
| 8 |
SCD2 |
| 9 |
SCD3 |
| 10 |
SCD4 |
| 11 |
SCD5 |
| 12 |
SCD6 |
| 13 |
SCD7 |
| 14 |
SCDPL |
| 15 |
Gnd |
| 16 |
DIFSENSE |
| 17 |
TERMPWR |
| 18 |
TERMPWR |
| 19 |
NC |
| 20 |
Gnd |
| 21 |
SCATN |
| 22 |
Gnd |
| 23 |
SCBSY |
| 24 |
SCACK |
| 25 |
SCRST |
| 26 |
SCMSG |
| 27 |
SCSEL |
| 28 |
SCCD |
| 29 |
SCREQ |
| 30 |
SCIO |
| 31 |
SCD8 |
| 32 |
SCD9 |
| 33 |
SCD10 |
| 34 |
SCD11 |
|
| PIN |
SIGNAL |
| 35 |
SCD#12 |
| 36 |
SCD#13 |
| 37 |
SCD#14 |
| 38 |
SCD#15 |
| 39 |
SCDPH# |
| 40 |
SCD#0 |
| 41 |
SCD#1 |
| 42 |
SCD#2 |
| 43 |
SCD#3 |
| 44 |
SCD#4 |
| 45 |
SCD#5 |
| 46 |
SCD#6 |
| 47 |
SCD#7 |
| 48 |
SCDPL# |
| 49 |
Gnd |
| 50 |
Gnd |
| 51 |
TERMPWR |
| 52 |
TERMPWR |
| 53 |
NC |
| 54 |
Gnd |
| 55 |
SCATN# |
| 56 |
Gnd |
| 57 |
SCBSY# |
| 58 |
SCACK# |
| 59 |
SCRST# |
| 60 |
SCMSG# |
| 61 |
SCSEL# |
| 62 |
SCCD# |
| 63 |
SCREQ# |
| 64 |
SCIO# |
| 65 |
SCD#8 |
| 66 |
SCD#9 |
| 67 |
SCD#10 |
| 68 |
SCD#11 |
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15 pin VGA Ultra Compact connector, Amp #788574-1
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| PIN |
SIGNAL |
| |
|
| 1 |
Red |
| |
|
| 2 |
Green |
| |
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| 3 |
Blue |
| |
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| 4 |
NC |
| |
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| 5 |
Gnd |
|
| PIN |
SIGNAL |
| |
|
| 6 |
Gnd |
| |
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| 7 |
Gnd |
| |
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| 8 |
Gnd |
| |
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| 9 |
+5V |
| |
|
| 10 |
Gnd |
|
| |
|
| PIN |
SIGNAL |
| |
|
| 11 |
NC |
| |
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| 12 |
EEDI |
| |
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| 13 |
HSYNC |
| |
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| 14 |
VSYNC |
| |
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| 15 |
EECS |
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8 pin shielded RJ-45 connector, Pulse #J0035D21B
| PIN |
SIGNAL |
| 1 |
TD+ |
| 2 |
TD- |
| 3 |
RX+ |
| 4 |
NC |
| 5 |
NC |
| 6 |
RX- |
| 7 |
NC |
| 8 |
NC |
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8 pin dual row header, Molex #702-46-0821
(+5V fused with self-resetting fuses)
| PIN |
SIGNAL |
| 1 |
+5V - USB0 |
| 3 |
USB0- |
| 5 |
USB0+ |
| 7 |
Gnd - USB0 |
|
| PIN |
SIGNAL |
| 2 |
+5V - USB1 |
| 4 |
USB1- |
| 6 |
USB1+ |
| 8 |
Gnd - USB1 |
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P18 - SYSTEM HARDWARE MONITOR CONNECTOR
4 pin single row header, Amp #640456-4
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
GPO (General Purpose Output) |
| 3 |
CI (Chassis Intrusion Input) |
| 4 |
OVT (Over Temperature) |
3 pin single row header, Molex #22-23-2031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
+12V |
| 3 |
FanTach |
|
2 pin single row header, Amp #640456-2
| PIN |
SIGNAL |
| 1 |
LED - |
| 2 |
LED + |
|
2 pin single row header, Amp #640456-2
| PIN |
SIGNAL |
| 1 |
SMB Clock |
| 2 |
SMB Data |
|
2 pin header, Molex #39-29-3026
4 pin header, Molex #39-29-3046
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
Gnd |
| 3 |
+12V |
| 4 |
+12V |
|
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The
Double Data Rate (DDR) memory interface consists of a single channel
which terminates in two dual in-line memory module (DIMM) sockets
and supports auto detection of up to 2GB of memory. The System BIOS
automatically detects memory type, size and speed.
The SBC uses industry standard 72-bit wide gold
finger PC1600 or PC2100 memory modules in two 184-pin sockets.
Memory modules
can be installed in one or both DIMM sockets. If only one DIMM module
is used, it should be populated in the top DIMM socket (Bank 2 -
BK2). If two modules are used, they must be the same DIMM speed
(PC1600 or PC2100), but may be different sizes (see table below).
Registered DIMMs are not supported. All memory modules must have
gold contacts.
The SBC supports DIMMs which are PC1600/PC2100
compliant and have the following features:
- 184-pin with gold-plated contacts
- ECC (72-bit) memory
- Unbuffered configuration
| DIMM Size |
DIMM Type |
ECC |
| 64 MB |
Unbuffered |
8M x 72 |
| 128 MB |
Unbuffered |
16M x 72 |
| 256 MB |
Unbuffered |
32M x 72 |
| 512 MB |
Unbuffered |
64M x 72 |
| 1 GB |
Unbuffered |
128M x 72 |
* Intel and Pentium are registered trademarks
of Intel Corporation.
All other product names are trademarks of
their respective owners.
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T4I
Product Detail.
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