The setup of the configuration jumpers on the SHB is described below.
* indicates the default value of each jumper.
NOTE: For two-position jumpers (3-post), "TOP" is toward the memory sockets; "BOTTOM" is toward the card edge fingers.
Install for one power-up cycle to reset the password to the default (null password).
Remove for normal operation. *
The Flash ROM has two programmable sections:
the Boot Block for "flashing" in the BIOS and the Main Block for the executable BIOS and PnP parameters. Normally only the Main Block is updated when a new BIOS is flashed into the system.
|
JU10 |
JU11 |
All Blocks Write Enabled Boot Block Write Protected Block 2-16 Write Protected |
Remove * Install Remove |
Remove * Remove Install |
|
Install on the TOP to clear.
Install on the BOTTOM to operate. *
NOTE:
To clear the CMOS, power down the system and
install the jumper on the TOP. Wait for at least two
seconds, move the jumper back to the BOTTOM and turn
the power on.
When AMIBIOS displays the "CMOS
Settings Wrong" message, press F1 to go into the BIOS
Setup Utility, where you may reenter your desired BIOS
settings,load optimal defaults or load failsafe defaults.
|
Pin 1 on the connectors is indicated by the square
pad
on the PCB.
8 pin shielded RJ-45 connector, Belfuse #0826-1X1T-23-F
| PIN |
SIGNAL |
| 1 |
TRP1+ |
| 2 |
TRP1- |
| 3 |
TRP2+ |
| 4 |
TRP3+ |
| 5 |
TRP3- |
| 6 |
TRP2- |
| 7 |
TRP4+ |
| 8 |
TRP4- |
|
4 pin single row header, Amp #640456-4
| PIN |
SIGNAL |
| 1 |
Speaker Data |
| 2 |
Key |
| 3 |
Gnd |
| 4 |
+5V |
|
2 pin single row header, Amp #640456-2
| PIN |
SIGNAL |
| 1 |
External Reset In (Low Active) |
| 2 |
Gnd |
|
40 pin dual row header, Amp #1-1761610-3
| PIN |
SIGNAL |
| 1 |
Reset |
| 3 |
Data 7 |
| 5 |
Data 6 |
| 7 |
Data 5 |
| 9 |
Data 4 |
| 11 |
Data 3 |
| 13 |
Data 2 |
| 15 |
Data 1 |
| 17 |
Data 0 |
| 19 |
Gnd |
| 21 |
DRQ 0 |
| 23 |
IOW |
| 25 |
IOR |
| 27 |
IORDY |
| 29 |
DACK 0 |
| 31 |
IRQ 14 |
| 33 |
Add 1 |
| 35 |
Add 0 |
| 37 |
CS 1P |
| 39 |
IDEACTP |
|
| PIN |
SIGNAL |
| 2 |
Gnd |
| 4 |
Data 8 |
| 6 |
Data 9 |
| 8 |
Data 10 |
| 10 |
Data 11 |
| 12 |
Data 12 |
| 14 |
Data 13 |
| 16 |
Data 14 |
| 18 |
Data 15 |
| 20 |
NC |
| 22 |
Gnd |
| 24 |
Gnd |
| 26 |
Gnd |
| 28 |
SELPDP |
| 30 |
Gnd |
| 32 |
NC |
| 34 |
PCBL DET* |
| 36 |
Add 2 |
| 38 |
CS 3P |
| 40 |
Gnd |
|
* For ATA/66 and ATA/100 drives, which should be set
for Cable Select for proper speed operation. If other
drives are detected, pin definition is Gnd.
4 pin single row header, Amp #640456-4
| PIN |
SIGNAL |
| 1 |
LED + |
| 2 |
LED - |
| 3 |
LED - |
| 4 |
LED + |
|
15 pin HD15 connector, Molex #48203-6042
| PIN |
SIGNAL |
| 1 |
Red |
| 2 |
Green |
| 3 |
Blue |
| 4 |
NC |
| 5 |
Gnd |
|
| PIN |
SIGNAL |
| 6 |
Gnd |
| 7 |
Gnd |
| 8 |
Gnd |
| 9 |
+5V |
| 10 |
Gnd |
|
| PIN |
SIGNAL |
| 11 |
NC |
| 12 |
EEDI |
| 13 |
HSYNC |
| 14 |
VSYNC |
| 15 |
EECS |
|
8 pin shielded RJ-45 connector, Belfuse #0826-1X1T-23-F
| PIN |
SIGNAL |
| 1 |
TRP1+ |
| 2 |
TRP1- |
| 3 |
TRP2+ |
| 4 |
TRP3+ |
| 5 |
TRP3- |
| 6 |
TRP2- |
| 7 |
TRP4+ |
| 8 |
TRP4- |
|
10 pin dual row header, AMP #1761610-3
(+5V fused with self-resetting fuses)
| PIN |
SIGNAL |
| 1 |
+5V - USB2 |
| 3 |
USB2- |
| 5 |
USB2+ |
| 7 |
Gnd - USB2 |
| 9 |
Chassis Gnd |
|
| PIN |
SIGNAL |
| 2 |
+5V - USB3 |
| 4 |
USB3- |
| 6 |
USB3+ |
| 8 |
Gnd - USB3 |
| 10 |
Chassis Gnd |
|
USB vertical connector, Molex #47500-0001
(+5V fused with self-resetting fuse)
| PIN |
SIGNAL |
| 1 |
+5V - USB1 |
| 2 |
USB1- |
| 3 |
USB1+ |
| 4 |
Gnd - USB1 |
|
USB vertical connector, Molex #47500-0001
(+5V fused with self-resetting fuse)
| PIN |
SIGNAL |
| 1 |
+5V - USB0 |
| 2 |
USB0- |
| 3 |
USB0+ |
| 4 |
Gnd - USB0 |
|
|
10 pin dual row header, AMP #1761610-3
(+5V fused with self-resetting fuses)
| PIN |
SIGNAL |
| 1 |
+5V - USB4 |
| 3 |
USB4- |
| 5 |
USB4+ |
| 7 |
Gnd - USB4 |
| 9 |
Chassis Gnd |
|
| PIN |
SIGNAL |
| 2 |
+5V - USB5 |
| 4 |
USB5- |
| 6 |
USB5+ |
| 8 |
Gnd - USB5 |
| 10 |
Chassis Gnd |
|
4 pin single row header, AMP #640456-4
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
GPO (General Purpose Output) |
| 3 |
CI (Chassis Intrusion Input) |
| 4 |
OVT (Over Temperature) |
|
3 pin single row header, Molex #22-23-2031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
+12V |
| 3 |
Fan Tach |
|
76 pin controlled impedance connector, Samtec #MIS-038-01-FD-K
| PIN |
SIGNAL |
| 1 |
+12V |
| 3 |
NC |
| 5 |
NC |
| 7 |
NC |
| 9 |
NC |
| 11 |
NC |
| 13 |
ICH_SMI# |
| 15 |
ICH_SIOPME# |
| 17 |
Gnd |
| 19 |
L_FRAME# |
| 21 |
L_DRQ1# |
| 23 |
L_DRQ0# |
| 25 |
SERIRQ |
| 27 |
Gnd |
| 29 |
PCLK14SIO |
| 31 |
Gnd |
| 33 |
SMBDATA_RESUME |
| 35 |
SMBCLK_RESUME |
| 37 |
SALRT#_RESUME |
| 39 |
Gnd |
| 41 |
EXP_CLK100 |
| 43 |
EXP_CLK100# |
| 45 |
Gnd |
| 47 |
C_PE_TXP4 |
| 49 |
C_PE_TXN4 |
| 51 |
Gnd |
| 53 |
C_PE_TXP3 |
| 55 |
C_PE_TXN3 |
| 57 |
Gnd |
| 59 |
C_PE_TXP2 |
| 61 |
C_PE_TXN2 |
| 63 |
Gnd |
| 65 |
C_PE_TXP1 |
| 67 |
C_PE_TXN1 |
| 69 |
Gnd |
| 71 |
+3.3V |
| 73 |
+3.3V |
| 75 |
+3.3V |
|
| PIN |
SIGNAL |
| 2 |
+5V_STANDBY |
| 4 |
+5V_STANDBY |
| 6 |
+5V_DUAL |
| 8 |
+5V_DUAL |
| 10 |
NC |
| 12 |
NC |
| 14 |
ICH_RCIN# |
| 16 |
ICH_A20GATE |
| 18 |
Gnd |
| 20 |
L_AD3 |
| 22 |
L_AD2 |
| 24 |
L_AD1 |
| 26 |
L_AD0 |
| 28 |
Gnd |
| 30 |
PCLK33LPC |
| 32 |
Gnd |
| 34 |
IPMB_DAT |
| 36 |
IPMB_CLK |
| 38 |
IPMB_ALRT# |
| 40 |
Gnd |
| 42 |
EXP_RESET# |
| 44 |
ICH_WAKE# |
| 46 |
Gnd |
| 48 |
C_PE_RXP4 |
| 50 |
C_PE_RXN4 |
| 52 |
Gnd |
| 54 |
C_PE_RXP3 |
| 56 |
C_PE_RXN3 |
| 58 |
Gnd |
| 60 |
C_PE_RXP2 |
| 62 |
C_PE_RXN2 |
| 64 |
Gnd |
| 66 |
C_PE_RXP1 |
| 68 |
C_PE_RXN1 |
| 70 |
Gnd |
| 72 |
+5V |
| 74 |
+5V |
| 76 |
+5V |
|
2 pin single row header, Amp #640456-2
| PIN |
SIGNAL |
| 1 |
LED - |
| 2 |
LED + |
|
7 pin vertical connector, Molex #67491-0031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
TX+ |
| 3 |
TX- |
| 4 |
Gnd |
|
| PIN |
SIGNAL |
| 5 |
RX- |
| 6 |
RX+ |
| 7 |
Gnd |
|
7 pin vertical connector, Molex #67491-0031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
TX+ |
| 3 |
TX- |
| 4 |
Gnd |
|
| PIN |
SIGNAL |
| 5 |
RX- |
| 6 |
RX+ |
| 7 |
Gnd |
|
7 pin vertical connector, Molex #67491-0031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
TX+ |
| 3 |
TX- |
| 4 |
Gnd |
|
| PIN |
SIGNAL |
| 5 |
RX- |
| 6 |
RX+ |
| 7 |
Gnd |
|
7 pin vertical connector, Molex #67491-0031
| PIN |
SIGNAL |
| 1 |
Gnd |
| 2 |
TX+ |
| 3 |
TX- |
| 4 |
Gnd |
|
| PIN |
SIGNAL |
| 5 |
RX- |
| 6 |
RX+ |
| 7 |
Gnd |
|
|
The Double Data Rate (DDR2) memory interface is a dual-channel interface which supports up to 4GB of memory and supports memory transfer rates of 400MHz, 533MHz and 667MHz. Each of the channels (A and B) terminates at a dual in-line memory module (DIMM) socket. The System BIOS automatically detects memory type, size and speed.
The SHB uses industry standard gold finger memory modules, which must be PC2-3200, PC2-4200 or PC2-5300 compliant and have the following features:
- Gold-plated contacts
- Non-ECC (64-bit) DDR2 memory
- Unbuffered configuration
The following DIMM sizes are supported:
| FSB |
DIMM Type |
Width |
Component Density |
| 1066 |
PC2-4200 |
x8, x16 |
256MB, 512MB, 1GB |
| 1066 |
PC2-5300 |
x8, x16 |
256MB, 512MB |
| 800 |
PC2-3200 |
x8, x16 |
256MB, 512MB, 1GB |
| 800 |
PC2-4200 |
x8, x16 |
256MB, 512MB, 1GB |
| 800 |
PC2-5300 |
x8, x16 |
256MB, 512MB |
| 533 |
PC2-3200 |
x8, x16 |
256MB, 512MB, 1GB |
| 533 |
PC2-4200 |
x8, x16 |
256MB, 512MB, 1GB |
To maximize system performance and reliability, Trenton recommends using DIMMs that support the Serial Presence Detect (SPD) data structure. All memory modules must have gold contacts.
Memory modules can be installed in one or both DIMM sockets. If only one DIMM module is used, it may be populated in either DIMM socket (BK1 or BK2). To operate at maximum bandwidth, two DIMMs of the same size must be installed, but the DIMMs may differ in technology (component density) and/or device width.
The SHB provides two types of memory operation, depending on how the DIMMs are populated. Asymmetric mode occurs when only one DIMM is installed or when two DIMMs are installed but differ in size. In the latter case, memory addressing begins with channel A, and when the top of channel A is reached, addressing starts at the bottom of channel B. The total system memory is the total installed in both channels, but accesses occur only at a width of 64 bits.
Interleave mode enables the highest memory interface speed and bandwidth throughput capacity. This is achieved by using two DIMM modules of the same memory size, although the DIMMs may vary in technology and/or device width. If the DIMMs are of different speeds, the slower memory module determines the memory interface speed.
For example, with a single PC2-5300 DIMM installed, the memory interface operates with a theoretical memory bandwidth of up to 5.4GB/s. If two PC2-5300 DIMMs which are identical in size are installed, they operate in interleave mode, where both DIMM channels are accessed simultaneously for a 128-bit wide memory subsystem access. This theoretically doubles the memory interface bandwidth to 10.7GB/s.
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